One of the most comprehensive refreshes of Intel architecture will start rolling out this summer. The PCI Express bus will replace current I/O interfaces, such as PCI for device interconnects and ...

AudioScience is promoting broadcast sound cards that use the next-generation PCI Express bus. PCI Express is an interface that uses serial data interconnects that run at 2.5 Gbps. The single-lane PCI ...

For more than a decade the PCI bus has been the backbone of personal computers. Other systems, such as telephony and networking, adopted the technology for its cost and performance advantages. But now ...

Why the need for PCI Express? As processor clock speeds increase, parallel buses such as PCI become harder to implement. Signal skew and fan-out restrictions restrict the bandwidth achievable on a ...

The XIO2001 is a single-function PCI Express to PCI translation bridge that is fully compliant to the PCI Express to PCI/PCI-X Bridge Specification, Revision 1.0. For downstream traffic, the bridge ...

Easier access to 66-Hz, 8- to 32-bit local bus systems is possible with PLX Technologies' PEX 8311 x1-lane PCI Express-to-local bus bridge. It includes root complex and end-point support. The ...

Things would go a whole lot better for server designs if we had a two year or better still a four year moratorium on adding faster compute engines to machines. That way, we could let memory subsystems ...

OPINION: When new PC standards come online there is a danger to assume that the benefit will come from an immediate performance boost. Danger because one of the defining features that sets modern ...

PCI Express (PCIe) is an emerging protocol for IO devices connection that is being rapidly adopted by the industry. An increasing number of applications require PCI Express connection support. A ...

Toshiba Corporation announced that it will launch two-lane SPDT switches that support PCI Express 3.0 (8Gbps). The new products, TC7PCI3412MT and TC7PCI3415MT, reduce switch terminal capacitance to ...

This paper describes a bus mastering implementation of the PCI Express protocol using a Xilinx FPGA. While the theoretical peak performance of PCI Express is quite high, attaining that performance is ...